{"id":16805,"date":"2019-11-21T14:20:00","date_gmt":"2019-11-21T19:20:00","guid":{"rendered":"https:\/\/michigan.it.umich.edu\/news\/?p=16805"},"modified":"2024-07-08T06:05:13","modified_gmt":"2024-07-08T10:05:13","slug":"taking-transistor-arrays-into-the-third-dimension","status":"publish","type":"post","link":"https:\/\/michigan.it.umich.edu\/news\/2019\/11\/21\/taking-transistor-arrays-into-the-third-dimension\/","title":{"rendered":"Taking transistor arrays into the third dimension"},"content":{"rendered":"\n
\""
An illustration of a step in the production process, injecting the zinc-tin-solution atop the spinning silicon chip. (Youngbae Son and Rose Anderson, Peterson Lab)<\/figcaption><\/figure><\/div>\n\n\n\n

Silicon integrated circuits, which are used in computer processors, are approaching the maximum feasible density of transistors on a single chip\u2014at least, in two-dimensional arrays. Now, a team of engineers at U-M have stacked a second layer of transistors directly atop a state-of-the-art silicon chip<\/a>.<\/p>\n\n\n\n

They propose that their design could remove the need for a second chip that converts between high- and-low voltage signals, which currently stands between the low-voltage processing chips and the higher-voltage user interfaces. \u201cOur approach can achieve better performance in a smaller, lighter package,\u201d said Becky Peterson<\/strong>, an associate professor of electrical engineering and computer science and project leader.<\/p>\n\n\n\n

<\/p>\n","protected":false},"excerpt":{"rendered":"

Silicon integrated circuits, which are used in computer processors, are approaching the maximum feasible density of transistors on a single chip\u2014at least, in two-dimensional arrays. Now, a team of engineers at U-M have stacked a second layer of transistors directly atop a state-of-the-art silicon chip. They propose that their design could remove the need for a second chip\u2026 Read More »<\/a><\/span><\/p>\n","protected":false},"author":1,"featured_media":16809,"comment_status":"open","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"_uag_custom_page_level_css":"","_umich_oidc_access":"","_monsterinsights_skip_tracking":false,"_monsterinsights_sitenote_active":false,"_monsterinsights_sitenote_note":"","_monsterinsights_sitenote_category":0,"_ef_editorial_meta_date_first-draft-date":"","_ef_editorial_meta_paragraph_assignment":"","_ef_editorial_meta_checkbox_needs-photo":"","_ef_editorial_meta_number_word-count":"","footnotes":""},"categories":[5],"tags":[290,270,534,130],"class_list":["post-16805","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-campus-news","tag-coe","tag-hardware","tag-microchip","tag-research"],"uagb_featured_image_src":{"full":["https:\/\/michigan.it.umich.edu\/news\/wp-content\/uploads\/2019\/12\/transistor.jpg",600,420,false],"thumbnail":["https:\/\/michigan.it.umich.edu\/news\/wp-content\/uploads\/2019\/12\/transistor-200x140.jpg",200,140,true],"medium":["https:\/\/michigan.it.umich.edu\/news\/wp-content\/uploads\/2019\/12\/transistor-286x200.jpg",286,200,true],"medium_large":["https:\/\/michigan.it.umich.edu\/news\/wp-content\/uploads\/2019\/12\/transistor.jpg",600,420,false],"large":["https:\/\/michigan.it.umich.edu\/news\/wp-content\/uploads\/2019\/12\/transistor.jpg",600,420,false],"1536x1536":["https:\/\/michigan.it.umich.edu\/news\/wp-content\/uploads\/2019\/12\/transistor.jpg",600,420,false],"2048x2048":["https:\/\/michigan.it.umich.edu\/news\/wp-content\/uploads\/2019\/12\/transistor.jpg",600,420,false],"excerpt-thumbnail":["https:\/\/michigan.it.umich.edu\/news\/wp-content\/uploads\/2019\/12\/transistor-200x140.jpg",200,140,true],"themonic-thumbnail":["https:\/\/michigan.it.umich.edu\/news\/wp-content\/uploads\/2019\/12\/transistor-60x42.jpg",60,42,true],"ioslider-thumbnail":["https:\/\/michigan.it.umich.edu\/news\/wp-content\/uploads\/2019\/12\/transistor-600x300.jpg",600,300,true],"post-thumbnail":["https:\/\/michigan.it.umich.edu\/news\/wp-content\/uploads\/2019\/12\/transistor.jpg",600,420,false],"400x250-crop":["https:\/\/michigan.it.umich.edu\/news\/wp-content\/uploads\/2019\/12\/transistor.jpg",357,250,false]},"uagb_author_info":{"display_name":"News Staff","author_link":"https:\/\/michigan.it.umich.edu\/news\/author\/mitnewsadm\/"},"uagb_comment_info":0,"uagb_excerpt":"Silicon integrated circuits, which are used in computer processors, are approaching the maximum feasible density of transistors on a single chip\u2014at least, in two-dimensional arrays. Now, a team of engineers at U-M have stacked a second layer of transistors directly atop a state-of-the-art silicon chip. They propose that their design could remove the need for…","_links":{"self":[{"href":"https:\/\/michigan.it.umich.edu\/news\/wp-json\/wp\/v2\/posts\/16805","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/michigan.it.umich.edu\/news\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/michigan.it.umich.edu\/news\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/michigan.it.umich.edu\/news\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/michigan.it.umich.edu\/news\/wp-json\/wp\/v2\/comments?post=16805"}],"version-history":[{"count":3,"href":"https:\/\/michigan.it.umich.edu\/news\/wp-json\/wp\/v2\/posts\/16805\/revisions"}],"predecessor-version":[{"id":16811,"href":"https:\/\/michigan.it.umich.edu\/news\/wp-json\/wp\/v2\/posts\/16805\/revisions\/16811"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/michigan.it.umich.edu\/news\/wp-json\/wp\/v2\/media\/16809"}],"wp:attachment":[{"href":"https:\/\/michigan.it.umich.edu\/news\/wp-json\/wp\/v2\/media?parent=16805"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/michigan.it.umich.edu\/news\/wp-json\/wp\/v2\/categories?post=16805"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/michigan.it.umich.edu\/news\/wp-json\/wp\/v2\/tags?post=16805"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}